[IA64] build linux kernel without using asm-xsi-offsets.h

All the relevent information are already exported with arch-ia64.h
Use linux asm-offsets.h to write xsi offsets defines.

Signed-off-by: Tristan Gingold <tristan.gingold@bull.net>
[Removed xen-mkbuildtree-post/-pre]
Signed-off-by: Alex Williamson <alex.williamson@hp.com>

diff --git a/linux-2.6-xen-sparse/arch/ia64/kernel/asm-offsets.c b/linux-2.6-xen-sparse/arch/ia64/kernel/asm-offsets.c
new file mode 100644 (file)
index 0000000..f018e7e
--- /dev/null
+++ b/linux-2.6-xen-sparse/arch/ia64/kernel/asm-offsets.c
@@ -0,0 +1,298 @@
+/*
+ * Generate definitions needed by assembly language modules.
+ * This code generates raw asm output which is post-processed
+ * to extract and format the required data.
+ */
+
+#define ASM_OFFSETS_C 1
+#include <linux/config.h>
+
+#include <linux/sched.h>
+
+#include <asm-ia64/processor.h>
+#include <asm-ia64/ptrace.h>
+#include <asm-ia64/siginfo.h>
+#include <asm-ia64/sigcontext.h>
+#include <asm-ia64/mca.h>
+
+#include "../kernel/sigframe.h"
+
+#define DEFINE(sym, val) \
+        asm volatile("\n->" #sym " %0 " #val : : "i" (val))
+
+#define BLANK() asm volatile("\n->" : : )
+
+void foo(void)
+{
+       DEFINE(IA64_TASK_SIZE, sizeof (struct task_struct));
+       DEFINE(IA64_THREAD_INFO_SIZE, sizeof (struct thread_info));
+       DEFINE(IA64_PT_REGS_SIZE, sizeof (struct pt_regs));
+       DEFINE(IA64_SWITCH_STACK_SIZE, sizeof (struct switch_stack));
+       DEFINE(IA64_SIGINFO_SIZE, sizeof (struct siginfo));
+       DEFINE(IA64_CPU_SIZE, sizeof (struct cpuinfo_ia64));
+       DEFINE(SIGFRAME_SIZE, sizeof (struct sigframe));
+       DEFINE(UNW_FRAME_INFO_SIZE, sizeof (struct unw_frame_info));
+
+       BLANK();
+
+       DEFINE(TI_FLAGS, offsetof(struct thread_info, flags));
+       DEFINE(TI_PRE_COUNT, offsetof(struct thread_info, preempt_count));
+
+       BLANK();
+
+       DEFINE(IA64_TASK_BLOCKED_OFFSET,offsetof (struct task_struct, blocked));
+       DEFINE(IA64_TASK_CLEAR_CHILD_TID_OFFSET,offsetof (struct task_struct, clear_child_tid));
+       DEFINE(IA64_TASK_GROUP_LEADER_OFFSET, offsetof (struct task_struct, group_leader));
+       DEFINE(IA64_TASK_PENDING_OFFSET,offsetof (struct task_struct, pending));
+       DEFINE(IA64_TASK_PID_OFFSET, offsetof (struct task_struct, pid));
+       DEFINE(IA64_TASK_REAL_PARENT_OFFSET, offsetof (struct task_struct, real_parent));
+       DEFINE(IA64_TASK_SIGHAND_OFFSET,offsetof (struct task_struct, sighand));
+       DEFINE(IA64_TASK_SIGNAL_OFFSET,offsetof (struct task_struct, signal));
+       DEFINE(IA64_TASK_TGID_OFFSET, offsetof (struct task_struct, tgid));
+       DEFINE(IA64_TASK_THREAD_KSP_OFFSET, offsetof (struct task_struct, thread.ksp));
+       DEFINE(IA64_TASK_THREAD_ON_USTACK_OFFSET, offsetof (struct task_struct, thread.on_ustack));
+
+       BLANK();
+
+       DEFINE(IA64_SIGHAND_SIGLOCK_OFFSET,offsetof (struct sighand_struct, siglock));
+
+       BLANK();
+
+       DEFINE(IA64_SIGNAL_GROUP_STOP_COUNT_OFFSET,offsetof (struct signal_struct,
+                                                            group_stop_count));
+       DEFINE(IA64_SIGNAL_SHARED_PENDING_OFFSET,offsetof (struct signal_struct, shared_pending));
+
+       BLANK();
+
+       DEFINE(IA64_PT_REGS_B6_OFFSET, offsetof (struct pt_regs, b6));
+       DEFINE(IA64_PT_REGS_B7_OFFSET, offsetof (struct pt_regs, b7));
+       DEFINE(IA64_PT_REGS_AR_CSD_OFFSET, offsetof (struct pt_regs, ar_csd));
+       DEFINE(IA64_PT_REGS_AR_SSD_OFFSET, offsetof (struct pt_regs, ar_ssd));
+       DEFINE(IA64_PT_REGS_R8_OFFSET, offsetof (struct pt_regs, r8));
+       DEFINE(IA64_PT_REGS_R9_OFFSET, offsetof (struct pt_regs, r9));
+       DEFINE(IA64_PT_REGS_R10_OFFSET, offsetof (struct pt_regs, r10));
+       DEFINE(IA64_PT_REGS_R11_OFFSET, offsetof (struct pt_regs, r11));
+       DEFINE(IA64_PT_REGS_CR_IPSR_OFFSET, offsetof (struct pt_regs, cr_ipsr));
+       DEFINE(IA64_PT_REGS_CR_IIP_OFFSET, offsetof (struct pt_regs, cr_iip));
+       DEFINE(IA64_PT_REGS_CR_IFS_OFFSET, offsetof (struct pt_regs, cr_ifs));
+       DEFINE(IA64_PT_REGS_AR_UNAT_OFFSET, offsetof (struct pt_regs, ar_unat));
+       DEFINE(IA64_PT_REGS_AR_PFS_OFFSET, offsetof (struct pt_regs, ar_pfs));
+       DEFINE(IA64_PT_REGS_AR_RSC_OFFSET, offsetof (struct pt_regs, ar_rsc));
+       DEFINE(IA64_PT_REGS_AR_RNAT_OFFSET, offsetof (struct pt_regs, ar_rnat));
+
+       DEFINE(IA64_PT_REGS_AR_BSPSTORE_OFFSET, offsetof (struct pt_regs, ar_bspstore));
+       DEFINE(IA64_PT_REGS_PR_OFFSET, offsetof (struct pt_regs, pr));
+       DEFINE(IA64_PT_REGS_B0_OFFSET, offsetof (struct pt_regs, b0));
+       DEFINE(IA64_PT_REGS_LOADRS_OFFSET, offsetof (struct pt_regs, loadrs));
+       DEFINE(IA64_PT_REGS_R1_OFFSET, offsetof (struct pt_regs, r1));
+       DEFINE(IA64_PT_REGS_R12_OFFSET, offsetof (struct pt_regs, r12));
+       DEFINE(IA64_PT_REGS_R13_OFFSET, offsetof (struct pt_regs, r13));
+       DEFINE(IA64_PT_REGS_AR_FPSR_OFFSET, offsetof (struct pt_regs, ar_fpsr));
+       DEFINE(IA64_PT_REGS_R15_OFFSET, offsetof (struct pt_regs, r15));
+       DEFINE(IA64_PT_REGS_R14_OFFSET, offsetof (struct pt_regs, r14));
+       DEFINE(IA64_PT_REGS_R2_OFFSET, offsetof (struct pt_regs, r2));
+       DEFINE(IA64_PT_REGS_R3_OFFSET, offsetof (struct pt_regs, r3));
+       DEFINE(IA64_PT_REGS_R16_OFFSET, offsetof (struct pt_regs, r16));
+       DEFINE(IA64_PT_REGS_R17_OFFSET, offsetof (struct pt_regs, r17));
+       DEFINE(IA64_PT_REGS_R18_OFFSET, offsetof (struct pt_regs, r18));
+       DEFINE(IA64_PT_REGS_R19_OFFSET, offsetof (struct pt_regs, r19));
+       DEFINE(IA64_PT_REGS_R20_OFFSET, offsetof (struct pt_regs, r20));
+       DEFINE(IA64_PT_REGS_R21_OFFSET, offsetof (struct pt_regs, r21));
+       DEFINE(IA64_PT_REGS_R22_OFFSET, offsetof (struct pt_regs, r22));
+       DEFINE(IA64_PT_REGS_R23_OFFSET, offsetof (struct pt_regs, r23));
+       DEFINE(IA64_PT_REGS_R24_OFFSET, offsetof (struct pt_regs, r24));
+       DEFINE(IA64_PT_REGS_R25_OFFSET, offsetof (struct pt_regs, r25));
+       DEFINE(IA64_PT_REGS_R26_OFFSET, offsetof (struct pt_regs, r26));
+       DEFINE(IA64_PT_REGS_R27_OFFSET, offsetof (struct pt_regs, r27));
+       DEFINE(IA64_PT_REGS_R28_OFFSET, offsetof (struct pt_regs, r28));
+       DEFINE(IA64_PT_REGS_R29_OFFSET, offsetof (struct pt_regs, r29));
+       DEFINE(IA64_PT_REGS_R30_OFFSET, offsetof (struct pt_regs, r30));
+       DEFINE(IA64_PT_REGS_R31_OFFSET, offsetof (struct pt_regs, r31));
+       DEFINE(IA64_PT_REGS_AR_CCV_OFFSET, offsetof (struct pt_regs, ar_ccv));
+       DEFINE(IA64_PT_REGS_F6_OFFSET, offsetof (struct pt_regs, f6));
+       DEFINE(IA64_PT_REGS_F7_OFFSET, offsetof (struct pt_regs, f7));
+       DEFINE(IA64_PT_REGS_F8_OFFSET, offsetof (struct pt_regs, f8));
+       DEFINE(IA64_PT_REGS_F9_OFFSET, offsetof (struct pt_regs, f9));
+       DEFINE(IA64_PT_REGS_F10_OFFSET, offsetof (struct pt_regs, f10));
+       DEFINE(IA64_PT_REGS_F11_OFFSET, offsetof (struct pt_regs, f11));
+
+       BLANK();
+
+       DEFINE(IA64_SWITCH_STACK_CALLER_UNAT_OFFSET, offsetof (struct switch_stack, caller_unat));
+       DEFINE(IA64_SWITCH_STACK_AR_FPSR_OFFSET, offsetof (struct switch_stack, ar_fpsr));
+       DEFINE(IA64_SWITCH_STACK_F2_OFFSET, offsetof (struct switch_stack, f2));
+       DEFINE(IA64_SWITCH_STACK_F3_OFFSET, offsetof (struct switch_stack, f3));
+       DEFINE(IA64_SWITCH_STACK_F4_OFFSET, offsetof (struct switch_stack, f4));
+       DEFINE(IA64_SWITCH_STACK_F5_OFFSET, offsetof (struct switch_stack, f5));
+       DEFINE(IA64_SWITCH_STACK_F12_OFFSET, offsetof (struct switch_stack, f12));
+       DEFINE(IA64_SWITCH_STACK_F13_OFFSET, offsetof (struct switch_stack, f13));
+       DEFINE(IA64_SWITCH_STACK_F14_OFFSET, offsetof (struct switch_stack, f14));
+       DEFINE(IA64_SWITCH_STACK_F15_OFFSET, offsetof (struct switch_stack, f15));
+       DEFINE(IA64_SWITCH_STACK_F16_OFFSET, offsetof (struct switch_stack, f16));
+       DEFINE(IA64_SWITCH_STACK_F17_OFFSET, offsetof (struct switch_stack, f17));
+       DEFINE(IA64_SWITCH_STACK_F18_OFFSET, offsetof (struct switch_stack, f18));
+       DEFINE(IA64_SWITCH_STACK_F19_OFFSET, offsetof (struct switch_stack, f19));
+       DEFINE(IA64_SWITCH_STACK_F20_OFFSET, offsetof (struct switch_stack, f20));
+       DEFINE(IA64_SWITCH_STACK_F21_OFFSET, offsetof (struct switch_stack, f21));
+       DEFINE(IA64_SWITCH_STACK_F22_OFFSET, offsetof (struct switch_stack, f22));
+       DEFINE(IA64_SWITCH_STACK_F23_OFFSET, offsetof (struct switch_stack, f23));
+       DEFINE(IA64_SWITCH_STACK_F24_OFFSET, offsetof (struct switch_stack, f24));
+       DEFINE(IA64_SWITCH_STACK_F25_OFFSET, offsetof (struct switch_stack, f25));
+       DEFINE(IA64_SWITCH_STACK_F26_OFFSET, offsetof (struct switch_stack, f26));
+       DEFINE(IA64_SWITCH_STACK_F27_OFFSET, offsetof (struct switch_stack, f27));
+       DEFINE(IA64_SWITCH_STACK_F28_OFFSET, offsetof (struct switch_stack, f28));
+       DEFINE(IA64_SWITCH_STACK_F29_OFFSET, offsetof (struct switch_stack, f29));
+       DEFINE(IA64_SWITCH_STACK_F30_OFFSET, offsetof (struct switch_stack, f30));
+       DEFINE(IA64_SWITCH_STACK_F31_OFFSET, offsetof (struct switch_stack, f31));
+       DEFINE(IA64_SWITCH_STACK_R4_OFFSET, offsetof (struct switch_stack, r4));
+       DEFINE(IA64_SWITCH_STACK_R5_OFFSET, offsetof (struct switch_stack, r5));
+       DEFINE(IA64_SWITCH_STACK_R6_OFFSET, offsetof (struct switch_stack, r6));
+       DEFINE(IA64_SWITCH_STACK_R7_OFFSET, offsetof (struct switch_stack, r7));
+       DEFINE(IA64_SWITCH_STACK_B0_OFFSET, offsetof (struct switch_stack, b0));
+       DEFINE(IA64_SWITCH_STACK_B1_OFFSET, offsetof (struct switch_stack, b1));
+       DEFINE(IA64_SWITCH_STACK_B2_OFFSET, offsetof (struct switch_stack, b2));
+       DEFINE(IA64_SWITCH_STACK_B3_OFFSET, offsetof (struct switch_stack, b3));
+       DEFINE(IA64_SWITCH_STACK_B4_OFFSET, offsetof (struct switch_stack, b4));
+       DEFINE(IA64_SWITCH_STACK_B5_OFFSET, offsetof (struct switch_stack, b5));
+       DEFINE(IA64_SWITCH_STACK_AR_PFS_OFFSET, offsetof (struct switch_stack, ar_pfs));
+       DEFINE(IA64_SWITCH_STACK_AR_LC_OFFSET, offsetof (struct switch_stack, ar_lc));
+       DEFINE(IA64_SWITCH_STACK_AR_UNAT_OFFSET, offsetof (struct switch_stack, ar_unat));
+       DEFINE(IA64_SWITCH_STACK_AR_RNAT_OFFSET, offsetof (struct switch_stack, ar_rnat));
+       DEFINE(IA64_SWITCH_STACK_AR_BSPSTORE_OFFSET, offsetof (struct switch_stack, ar_bspstore));
+       DEFINE(IA64_SWITCH_STACK_PR_OFFSET, offsetof (struct switch_stack, pr));
+
+       BLANK();
+
+       DEFINE(IA64_SIGCONTEXT_IP_OFFSET, offsetof (struct sigcontext, sc_ip));
+       DEFINE(IA64_SIGCONTEXT_AR_BSP_OFFSET, offsetof (struct sigcontext, sc_ar_bsp));
+       DEFINE(IA64_SIGCONTEXT_AR_FPSR_OFFSET, offsetof (struct sigcontext, sc_ar_fpsr));
+       DEFINE(IA64_SIGCONTEXT_AR_RNAT_OFFSET, offsetof (struct sigcontext, sc_ar_rnat));
+       DEFINE(IA64_SIGCONTEXT_AR_UNAT_OFFSET, offsetof (struct sigcontext, sc_ar_unat));
+       DEFINE(IA64_SIGCONTEXT_B0_OFFSET, offsetof (struct sigcontext, sc_br[0]));
+       DEFINE(IA64_SIGCONTEXT_CFM_OFFSET, offsetof (struct sigcontext, sc_cfm));
+       DEFINE(IA64_SIGCONTEXT_FLAGS_OFFSET, offsetof (struct sigcontext, sc_flags));
+       DEFINE(IA64_SIGCONTEXT_FR6_OFFSET, offsetof (struct sigcontext, sc_fr[6]));
+       DEFINE(IA64_SIGCONTEXT_PR_OFFSET, offsetof (struct sigcontext, sc_pr));
+       DEFINE(IA64_SIGCONTEXT_R12_OFFSET, offsetof (struct sigcontext, sc_gr[12]));
+       DEFINE(IA64_SIGCONTEXT_RBS_BASE_OFFSET,offsetof (struct sigcontext, sc_rbs_base));
+       DEFINE(IA64_SIGCONTEXT_LOADRS_OFFSET, offsetof (struct sigcontext, sc_loadrs));
+
+       BLANK();
+
+       DEFINE(IA64_SIGPENDING_SIGNAL_OFFSET, offsetof (struct sigpending, signal));
+
+       BLANK();
+
+       DEFINE(IA64_SIGFRAME_ARG0_OFFSET, offsetof (struct sigframe, arg0));
+       DEFINE(IA64_SIGFRAME_ARG1_OFFSET, offsetof (struct sigframe, arg1));
+       DEFINE(IA64_SIGFRAME_ARG2_OFFSET, offsetof (struct sigframe, arg2));
+       DEFINE(IA64_SIGFRAME_HANDLER_OFFSET, offsetof (struct sigframe, handler));
+       DEFINE(IA64_SIGFRAME_SIGCONTEXT_OFFSET, offsetof (struct sigframe, sc));
+       BLANK();
+    /* for assembly files which can't include sched.h: */
+       DEFINE(IA64_CLONE_VFORK, CLONE_VFORK);
+       DEFINE(IA64_CLONE_VM, CLONE_VM);
+
+       BLANK();
+       DEFINE(IA64_CPUINFO_NSEC_PER_CYC_OFFSET,
+              offsetof (struct cpuinfo_ia64, nsec_per_cyc));
+       DEFINE(IA64_CPUINFO_PTCE_BASE_OFFSET,
+              offsetof (struct cpuinfo_ia64, ptce_base));
+       DEFINE(IA64_CPUINFO_PTCE_COUNT_OFFSET,
+              offsetof (struct cpuinfo_ia64, ptce_count));
+       DEFINE(IA64_CPUINFO_PTCE_STRIDE_OFFSET,
+              offsetof (struct cpuinfo_ia64, ptce_stride));
+       BLANK();
+       DEFINE(IA64_TIMESPEC_TV_NSEC_OFFSET,
+              offsetof (struct timespec, tv_nsec));
+
+       DEFINE(CLONE_SETTLS_BIT, 19);
+#if CLONE_SETTLS != (1<<19)
+# error "CLONE_SETTLS_BIT incorrect, please fix"
+#endif
+
+       BLANK();
+       DEFINE(IA64_MCA_CPU_MCA_STACK_OFFSET,
+              offsetof (struct ia64_mca_cpu, mca_stack));
+       DEFINE(IA64_MCA_CPU_INIT_STACK_OFFSET,
+              offsetof (struct ia64_mca_cpu, init_stack));
+       BLANK();
+       DEFINE(IA64_SAL_OS_STATE_COMMON_OFFSET,
+              offsetof (struct ia64_sal_os_state, sal_ra));
+       DEFINE(IA64_SAL_OS_STATE_OS_GP_OFFSET,
+              offsetof (struct ia64_sal_os_state, os_gp));
+       DEFINE(IA64_SAL_OS_STATE_PAL_MIN_STATE_OFFSET,
+              offsetof (struct ia64_sal_os_state, pal_min_state));
+       DEFINE(IA64_SAL_OS_STATE_PROC_STATE_PARAM_OFFSET,
+              offsetof (struct ia64_sal_os_state, proc_state_param));
+       DEFINE(IA64_SAL_OS_STATE_SIZE,
+              sizeof (struct ia64_sal_os_state));
+       DEFINE(IA64_PMSA_GR_OFFSET,
+              offsetof (struct pal_min_state_area_s, pmsa_gr));
+       DEFINE(IA64_PMSA_BANK1_GR_OFFSET,
+              offsetof (struct pal_min_state_area_s, pmsa_bank1_gr));
+       DEFINE(IA64_PMSA_PR_OFFSET,
+              offsetof (struct pal_min_state_area_s, pmsa_pr));
+       DEFINE(IA64_PMSA_BR0_OFFSET,
+              offsetof (struct pal_min_state_area_s, pmsa_br0));
+       DEFINE(IA64_PMSA_RSC_OFFSET,
+              offsetof (struct pal_min_state_area_s, pmsa_rsc));
+       DEFINE(IA64_PMSA_IIP_OFFSET,
+              offsetof (struct pal_min_state_area_s, pmsa_iip));
+       DEFINE(IA64_PMSA_IPSR_OFFSET,
+              offsetof (struct pal_min_state_area_s, pmsa_ipsr));
+       DEFINE(IA64_PMSA_IFS_OFFSET,
+              offsetof (struct pal_min_state_area_s, pmsa_ifs));
+       DEFINE(IA64_PMSA_XIP_OFFSET,
+              offsetof (struct pal_min_state_area_s, pmsa_xip));
+       BLANK();
+
+       /* used by fsys_gettimeofday in arch/ia64/kernel/fsys.S */
+       DEFINE(IA64_TIME_INTERPOLATOR_ADDRESS_OFFSET, offsetof (struct time_interpolator, addr));
+       DEFINE(IA64_TIME_INTERPOLATOR_SOURCE_OFFSET, offsetof (struct time_interpolator, source));
+       DEFINE(IA64_TIME_INTERPOLATOR_SHIFT_OFFSET, offsetof (struct time_interpolator, shift));
+       DEFINE(IA64_TIME_INTERPOLATOR_NSEC_OFFSET, offsetof (struct time_interpolator, nsec_per_cyc));
+       DEFINE(IA64_TIME_INTERPOLATOR_OFFSET_OFFSET, offsetof (struct time_interpolator, offset));
+       DEFINE(IA64_TIME_INTERPOLATOR_LAST_CYCLE_OFFSET, offsetof (struct time_interpolator, last_cycle));
+       DEFINE(IA64_TIME_INTERPOLATOR_LAST_COUNTER_OFFSET, offsetof (struct time_interpolator, last_counter));
+       DEFINE(IA64_TIME_INTERPOLATOR_JITTER_OFFSET, offsetof (struct time_interpolator, jitter));
+       DEFINE(IA64_TIME_INTERPOLATOR_MASK_OFFSET, offsetof (struct time_interpolator, mask));
+       DEFINE(IA64_TIME_SOURCE_CPU, TIME_SOURCE_CPU);
+       DEFINE(IA64_TIME_SOURCE_MMIO64, TIME_SOURCE_MMIO64);
+       DEFINE(IA64_TIME_SOURCE_MMIO32, TIME_SOURCE_MMIO32);
+       DEFINE(IA64_TIMESPEC_TV_NSEC_OFFSET, offsetof (struct timespec, tv_nsec));
+
+#ifdef CONFIG_XEN
+       BLANK();
+
+       DEFINE(XSI_PSR_I_ADDR_OFS, (XSI_OFS + offsetof(mapped_regs_t, interrupt_mask_addr)));
+       DEFINE(XSI_IPSR_OFS, (XSI_OFS + offsetof(mapped_regs_t, ipsr)));
+       DEFINE(XSI_IIP_OFS, (XSI_OFS + offsetof(mapped_regs_t, iip)));
+       DEFINE(XSI_IFS_OFS, (XSI_OFS + offsetof(mapped_regs_t, ifs)));
+       DEFINE(XSI_PRECOVER_IFS_OFS, (XSI_OFS + offsetof(mapped_regs_t, precover_ifs)));
+       DEFINE(XSI_ISR_OFS, (XSI_OFS + offsetof(mapped_regs_t, isr)));
+       DEFINE(XSI_IFA_OFS, (XSI_OFS + offsetof(mapped_regs_t, ifa)));
+       DEFINE(XSI_IIPA_OFS, (XSI_OFS + offsetof(mapped_regs_t, iipa)));
+       DEFINE(XSI_IIM_OFS, (XSI_OFS + offsetof(mapped_regs_t, iim)));
+       DEFINE(XSI_TPR_OFS, (XSI_OFS + offsetof(mapped_regs_t, tpr)));
+       DEFINE(XSI_IHA_OFS, (XSI_OFS + offsetof(mapped_regs_t, iha)));
+       DEFINE(XSI_ITIR_OFS, (XSI_OFS + offsetof(mapped_regs_t, itir)));
+       DEFINE(XSI_ITV_OFS, (XSI_OFS + offsetof(mapped_regs_t, itv)));
+       DEFINE(XSI_PTA_OFS, (XSI_OFS + offsetof(mapped_regs_t, pta)));
+       DEFINE(XSI_PSR_IC_OFS, (XSI_OFS + offsetof(mapped_regs_t, interrupt_collection_enabled)));
+       DEFINE(XSI_PEND_OFS, (XSI_OFS + offsetof(mapped_regs_t, pending_interruption)));
+       DEFINE(XSI_INCOMPL_REGFR_OFS, (XSI_OFS + offsetof(mapped_regs_t, incomplete_regframe)));
+       DEFINE(XSI_METAPHYS_OFS, (XSI_OFS + offsetof(mapped_regs_t, metaphysical_mode)));
+
+       DEFINE(XSI_BANKNUM_OFS, (XSI_OFS + offsetof(mapped_regs_t, banknum)));
+
+       DEFINE(XSI_BANK0_R16_OFS, (XSI_OFS + offsetof(mapped_regs_t, bank0_regs[0])));
+       DEFINE(XSI_BANK1_R16_OFS, (XSI_OFS + offsetof(mapped_regs_t, bank1_regs[0])));
+       DEFINE(XSI_B0NATS_OFS, (XSI_OFS + offsetof(mapped_regs_t, vbnat)));
+       DEFINE(XSI_B1NATS_OFS, (XSI_OFS + offsetof(mapped_regs_t, vnat)));
+       DEFINE(XSI_RR0_OFS, (XSI_OFS + offsetof(mapped_regs_t, rrs[0])));
+       DEFINE(XSI_KR0_OFS, (XSI_OFS + offsetof(mapped_regs_t, krs[0])));
+       DEFINE(XSI_PKR0_OFS, (XSI_OFS + offsetof(mapped_regs_t, pkrs[0])));
+       DEFINE(XSI_TMP0_OFS, (XSI_OFS + offsetof(mapped_regs_t, tmp[0])));
+#endif /* CONFIG_XEN */
+}

diff --git a/linux-2.6-xen-sparse/arch/ia64/xen-mkbuildtree-post b/linux-2.6-xen-sparse/arch/ia64/xen-mkbuildtree-post
deleted file mode 100755 (executable)
index 6bd7f44..0000000
--- a/linux-2.6-xen-sparse/arch/ia64/xen-mkbuildtree-post
+++ /dev/null
@@ -1,2 +0,0 @@
-#!/bin/bash
-echo 'NOTHING YET IN ' ${0}

diff --git a/linux-2.6-xen-sparse/arch/ia64/xen-mkbuildtree-pre b/linux-2.6-xen-sparse/arch/ia64/xen-mkbuildtree-pre
deleted file mode 100755 (executable)
index 877f354..0000000
--- a/linux-2.6-xen-sparse/arch/ia64/xen-mkbuildtree-pre
+++ /dev/null
@@ -1,12 +0,0 @@
-#!/bin/bash
-# restructure directories to match future drivers/xen plan
-# and move aside xen/x86 specific changes
-# WARNING!: This directory movement really confuses hg which makes
-# it difficult to do development in a directory which is being used
-# for building (as all files in mv'd directories are thought by hg
-# to have been deleted).  I don't know how to avoid this right now,
-# but if someone has a better way, I'm all ears
-
-#eventually asm-xsi-offsets needs to be part of hypervisor.h/hypercall.h
-ln -sf ../../../../xen/include/asm-ia64/asm-xsi-offsets.h include/asm-ia64/xen/
-

diff --git a/linux-2.6-xen-sparse/arch/ia64/xen/xenentry.S b/linux-2.6-xen-sparse/arch/ia64/xen/xenentry.S
index 0281e4cb9f271b1fa05937ef2d4f5117e29be359..bd66913f4fc7e22172f5ee9d752aa32d2fc787e5 100644 (file)
--- a/linux-2.6-xen-sparse/arch/ia64/xen/xenentry.S
+++ b/linux-2.6-xen-sparse/arch/ia64/xen/xenentry.S
@@ -765,7 +765,7 @@ skip_rbs_switch:
 #ifdef CONFIG_XEN
        movl r25=XSI_IPSR
        ;;
-       st8[r25]=r29,XSI_IFS-XSI_IPSR
+       st8[r25]=r29,XSI_IFS_OFS-XSI_IPSR_OFS
        ;;
 #else
        mov cr.ipsr=r29         // M2
@@ -776,7 +776,7 @@ skip_rbs_switch:
 #ifdef CONFIG_XEN
 (p9)   st8 [r25]=r30
        ;;
-       adds r25=XSI_IIP-XSI_IFS,r25
+       adds r25=XSI_IIP_OFS-XSI_IFS_OFS,r25
        ;;
 #else
 (p9)   mov cr.ifs=r30          // M2

diff --git a/linux-2.6-xen-sparse/arch/ia64/xen/xenivt.S b/linux-2.6-xen-sparse/arch/ia64/xen/xenivt.S
index 1a8bfd71a577391a9c94a322815d005a0bb10a3a..1b2e0e810075c32fbc3f6b2454f2f8008dc18457 100644 (file)
--- a/linux-2.6-xen-sparse/arch/ia64/xen/xenivt.S
+++ b/linux-2.6-xen-sparse/arch/ia64/xen/xenivt.S
@@ -446,7 +446,7 @@ ENTRY(alt_itlb_miss)
 #ifdef CONFIG_XEN
        movl r31=XSI_IPSR
        ;;
-       ld8 r21=[r31],XSI_IFA-XSI_IPSR  // get ipsr, point to ifa
+       ld8 r21=[r31],XSI_IFA_OFS-XSI_IPSR_OFS  // get ipsr, point to ifa
        movl r17=PAGE_KERNEL
        ;;
        ld8 r16=[r31]           // get ifa
@@ -508,10 +508,10 @@ ENTRY(alt_dtlb_miss)
 #ifdef CONFIG_XEN
        movl r31=XSI_IPSR
        ;;
-       ld8 r21=[r31],XSI_ISR-XSI_IPSR  // get ipsr, point to isr
+       ld8 r21=[r31],XSI_ISR_OFS-XSI_IPSR_OFS  // get ipsr, point to isr
        movl r17=PAGE_KERNEL
        ;;
-       ld8 r20=[r31],XSI_IFA-XSI_ISR   // get isr, point to ifa
+       ld8 r20=[r31],XSI_IFA_OFS-XSI_ISR_OFS   // get isr, point to ifa
        movl r19=(((1 << IA64_MAX_PHYS_BITS) - 1) & ~0xfff)
        ;;
        ld8 r16=[r31]           // get ifa
@@ -688,12 +688,12 @@ ENTRY(page_fault)
 #ifdef CONFIG_XEN
        movl r3=XSI_ISR
        ;;
-       ld8 out1=[r3],XSI_IFA-XSI_ISR           // get vcr.isr, point to ifa
+       ld8 out1=[r3],XSI_IFA_OFS-XSI_ISR_OFS   // get vcr.isr, point to ifa
        ;;
        ld8 out0=[r3]                           // get vcr.ifa
        mov r14=1
        ;;
-       add r3=XSI_PSR_IC-XSI_IFA, r3           // point to vpsr.ic
+       add r3=XSI_PSR_IC_OFS-XSI_IFA_OFS, r3   // point to vpsr.ic
        ;;
        st4 [r3]=r14                            // vpsr.ic = 1
        adds r3=8,r2                            // set up second base pointer
@@ -737,7 +737,7 @@ xen_page_fault:
        ;;
 (p15)  ld8 r3=[r3]
        ;;
-(p15)  st1 [r3]=r0,XSI_PEND-XSI_PSR_I_ADDR     // if (p15) vpsr.i = 1
+(p15)  st1 [r3]=r0,XSI_PEND_OFS-XSI_PSR_I_ADDR_OFS     // if (p15) vpsr.i = 1
        mov r14=r0
        ;;
 (p15)  ld4 r14=[r3]                            // if (pending_interrupts)
@@ -1047,7 +1047,7 @@ ENTRY(break_fault)
 #ifdef CONFIG_XEN
        movl r22=XSI_IPSR
        ;;
-       ld8 r29=[r22],XSI_IIM-XSI_IPSR          // get ipsr, point to iip
+       ld8 r29=[r22],XSI_IIM_OFS-XSI_IPSR_OFS  // get ipsr, point to iip
 #else
        mov r29=cr.ipsr                         // M2 (12 cyc)
 #endif
@@ -1055,7 +1055,7 @@ ENTRY(break_fault)
 
 #ifdef CONFIG_XEN
        ;;
-       ld8 r17=[r22],XSI_IIP-XSI_IIM
+       ld8 r17=[r22],XSI_IIP_OFS-XSI_IIM_OFS
 #else
        mov r17=cr.iim                          // M2 (2 cyc)
 #endif
@@ -1156,7 +1156,7 @@ ENTRY(break_fault)
        movl r16=XSI_PSR_IC
        mov r3=1
        ;;
-       st4 [r16]=r3,XSI_PSR_I_ADDR-XSI_PSR_IC  // vpsr.ic = 1
+       st4 [r16]=r3,XSI_PSR_I_ADDR_OFS-XSI_PSR_IC_OFS  // vpsr.ic = 1
 #else
        ssm psr.ic | PSR_DEFAULT_BITS           // M2   now it's safe to re-enable intr.-collection
 #endif
@@ -1170,7 +1170,7 @@ ENTRY(break_fault)
 #ifdef CONFIG_XEN
 (p15)  ld8 r16=[r16]                           // vpsr.i
        ;;
-(p15)  st1 [r16]=r0,XSI_PEND-XSI_PSR_I_ADDR    // if (p15) vpsr.i = 1
+(p15)  st1 [r16]=r0,XSI_PEND_OFS-XSI_PSR_I_ADDR_OFS    // if (p15) vpsr.i = 1
        mov r2=r0
        ;;
 (p15)  ld4 r2=[r16]                            // if (pending_interrupts)

diff --git a/linux-2.6-xen-sparse/arch/ia64/xen/xenpal.S b/linux-2.6-xen-sparse/arch/ia64/xen/xenpal.S
index bfeff667dd628b8b508e6c8609913a20c14dca27..5f9681e49ae9e2a67214759fe60a655c4a0ae15c 100644 (file)
--- a/linux-2.6-xen-sparse/arch/ia64/xen/xenpal.S
+++ b/linux-2.6-xen-sparse/arch/ia64/xen/xenpal.S
@@ -45,7 +45,7 @@ GLOBAL_ENTRY(xen_pal_call_static)
        ;;
 (p6)   st4 [r31]=r0
        ;;
-(p7)   adds r31=XSI_PSR_I_ADDR-XSI_PSR_IC,r31
+(p7)   adds r31=XSI_PSR_I_ADDR_OFS-XSI_PSR_IC_OFS,r31
 (p7)   mov r22=1
        ;;
 (p7)   ld8 r31=[r31]

diff --git a/linux-2.6-xen-sparse/include/asm-ia64/xen/privop.h b/linux-2.6-xen-sparse/include/asm-ia64/xen/privop.h
index 3d22b26680e0277a9dca35838c4165bf1ed896f4..6d4c747c7a643c62202bc9dd87a988277f6c3419 100644 (file)
--- a/linux-2.6-xen-sparse/include/asm-ia64/xen/privop.h
+++ b/linux-2.6-xen-sparse/include/asm-ia64/xen/privop.h
@@ -10,11 +10,13 @@
  */
 
 
-#include <asm/xen/asm-xsi-offsets.h>
 #include <xen/interface/arch-ia64.h>
 
 #define IA64_PARAVIRTUALIZED
 
+#define XSI_OFS                XSI_SIZE
+#define XPRIVREG_BASE  (XSI_BASE + XSI_SIZE)
+
 #ifdef __ASSEMBLY__
 #define        XEN_HYPER_RFI                   break HYPERPRIVOP_RFI
 #define        XEN_HYPER_RSM_PSR_DT            break HYPERPRIVOP_RSM_DT
@@ -39,6 +41,21 @@
 #define        XEN_HYPER_GET_PMD               break HYPERPRIVOP_GET_PMD
 #define        XEN_HYPER_GET_EFLAG             break HYPERPRIVOP_GET_EFLAG
 #define        XEN_HYPER_SET_EFLAG             break HYPERPRIVOP_SET_EFLAG
+
+#define XSI_IFS                        (XSI_BASE + XSI_IFS_OFS)
+#define XSI_PRECOVER_IFS       (XSI_BASE + XSI_PRECOVER_IFS_OFS)
+#define XSI_INCOMPL_REGFR      (XSI_BASE + XSI_INCOMPL_REGFR_OFS)
+#define XSI_IFA                        (XSI_BASE + XSI_IFA_OFS)
+#define XSI_ISR                        (XSI_BASE + XSI_ISR_OFS)
+#define XSI_IIM                        (XSI_BASE + XSI_IIM_OFS)
+#define XSI_ITIR               (XSI_BASE + XSI_ITIR_OFS)
+#define XSI_PSR_I_ADDR         (XSI_BASE + XSI_PSR_I_ADDR_OFS)
+#define XSI_PSR_IC             (XSI_BASE + XSI_PSR_IC_OFS)
+#define XSI_IPSR               (XSI_BASE + XSI_IPSR_OFS)
+#define XSI_IIP                        (XSI_BASE + XSI_IIP_OFS)
+#define XSI_BANK1_R16          (XSI_BASE + XSI_BANK1_R16_OFS)
+#define XSI_BANKNUM            (XSI_BASE + XSI_BANKNUM_OFS)
+#define XSI_IHA                        (XSI_BASE + XSI_IHA_OFS)
 #endif
 
 #ifndef __ASSEMBLY__
@@ -81,15 +98,16 @@ extern void xen_set_eflag(unsigned long);   /* see xen_ia64_setreg */
  * Others, like "pend", are abstractions based on privileged registers.
  * "Pend" is guaranteed to be set if reading cr.ivr would return a
  * (non-spurious) interrupt. */
+#define XEN_PRIVREGS ((struct mapped_regs *)XPRIVREG_BASE)
 #define XSI_PSR_I                      \
-       (*(uint64_t *)(XSI_PSR_I_ADDR))
+       (*XEN_PRIVREGS->interrupt_mask_addr)
 #define xen_get_virtual_psr_i()                \
-       (!(*(uint8_t *)(XSI_PSR_I)))
+       (!XSI_PSR_I)
 #define xen_set_virtual_psr_i(_val)    \
-       ({ *(uint8_t *)(XSI_PSR_I) = (uint8_t)(_val) ? 0:1; })
+       ({ XSI_PSR_I = (uint8_t)(_val) ? 0 : 1; })
 #define xen_set_virtual_psr_ic(_val)   \
-       ({ *(int *)(XSI_PSR_IC) = _val ? 1:0; })
-#define xen_get_virtual_pend()         (*(int *)(XSI_PEND))
+       ({ XEN_PRIVREGS->interrupt_collection_enabled = _val ? 1 : 0; })
+#define xen_get_virtual_pend()         (XEN_PRIVREGS->pending_interruption)
 
 /* Hyperprivops are "break" instructions with a well-defined API.
  * In particular, the virtual psr.ic bit must be off; in this way

diff --git a/xen/arch/ia64/asm-xsi-offsets.c b/xen/arch/ia64/asm-xsi-offsets.c
index de24bacaa62ad8ddfc48b52d913c76b5db4c2fdc..1ea734da59bfd98398385d6a24e0bbdad120a5c2 100755 (executable)
--- a/xen/arch/ia64/asm-xsi-offsets.c
+++ b/xen/arch/ia64/asm-xsi-offsets.c
@@ -48,7 +48,7 @@
 void foo(void)
 {
        /* First is shared info page, and then arch specific vcpu context */
-       DEFINE(XSI_BASE, SHAREDINFO_ADDR);
+       //DEFINE(XSI_BASE, SHAREDINFO_ADDR);
 
        DEFINE(XSI_PSR_I_ADDR_OFS, (XSI_OFS + offsetof(mapped_regs_t, interrupt_mask_addr)));
        DEFINE(XSI_PSR_I_ADDR, (SHARED_ARCHINFO_ADDR+offsetof(mapped_regs_t, interrupt_mask_addr)));

diff --git a/xen/arch/ia64/xen/fw_emul.c b/xen/arch/ia64/xen/fw_emul.c
index bfd5fe624d740394a968239487e8ee98f42a79a5..8cc85d25af55d3d212c5be5c7246fddf5e6b9653 100644 (file)
--- a/xen/arch/ia64/xen/fw_emul.c
+++ b/xen/arch/ia64/xen/fw_emul.c
@@ -373,7 +373,7 @@ again:
                if (*fault != IA64_NO_FAULT) return 0;
        }
 
-       virt = domain_mpa_to_imva(v->domain, mpaddr);
+       virt = (unsigned long)domain_mpa_to_imva(v->domain, mpaddr);
        *page = virt_to_page(virt);
        if (get_page(*page, current->domain) == 0) {
                if (page_get_owner(*page) != current->domain) {

diff --git a/xen/arch/ia64/xen/vcpu.c b/xen/arch/ia64/xen/vcpu.c
index e0b639a7cc37e4e71b94a8f1a2b2cf423f932996..b92721223faf18309113b03d2330001f92840119 100644 (file)
--- a/xen/arch/ia64/xen/vcpu.c
+++ b/xen/arch/ia64/xen/vcpu.c
@@ -174,7 +174,8 @@ void vcpu_init_regs (struct vcpu *v)
                VCPU(v, banknum) = 1;
                VCPU(v, metaphysical_mode) = 1;
                VCPU(v, interrupt_mask_addr) =
-                   v->domain->arch.shared_info_va + INT_ENABLE_OFFSET(v);
+                            (unsigned char *)v->domain->arch.shared_info_va +
+                            INT_ENABLE_OFFSET(v);
                VCPU(v, itv) = (1 << 16); /* timer vector masked */
        }
 

diff --git a/xen/include/asm-ia64/vmx.h b/xen/include/asm-ia64/vmx.h
index 3e07a6c32d75982a1bbf0d9fcb739c203a3f4b27..9dfadbac5a66ad9b1e7383d95c9a76d0397a722b 100644 (file)
--- a/xen/include/asm-ia64/vmx.h
+++ b/xen/include/asm-ia64/vmx.h
@@ -55,6 +55,7 @@ extern void vmx_intr_assist(struct vcpu *v);
 extern void set_illegal_op_isr (struct vcpu *vcpu);
 extern void illegal_op (struct vcpu *vcpu);
 extern void vmx_relinquish_vcpu_resources(struct vcpu *v);
+extern void vmx_die_if_kernel(char *str, struct pt_regs *regs, long err);
 
 static inline vcpu_iodata_t *get_vio(struct domain *d, unsigned long cpu)
 {

diff --git a/xen/include/public/arch-ia64.h b/xen/include/public/arch-ia64.h
index 6eadb0c893268e65ef05c4e23a4d7e848b68f794..bdd592241344514dcaf9d50f9c914a2fbe004c25 100644 (file)
--- a/xen/include/public/arch-ia64.h
+++ b/xen/include/public/arch-ia64.h
@@ -283,7 +283,7 @@ struct mapped_regs {
              * shared info area now. interrupt_mask_addr is the address
              * of evtchn_upcall_mask for current vcpu
              */
-            unsigned long interrupt_mask_addr;
+            unsigned char *interrupt_mask_addr;
             int pending_interruption;
             int incomplete_regframe; // see SDM vol2 6.8
             unsigned char vpsr_pp;
@@ -380,6 +380,14 @@ DEFINE_XEN_GUEST_HANDLE(vcpu_guest_context_t);
 
 #endif /* !__ASSEMBLY__ */
 
+/* Address of shared_info in domain virtual space.  */
+#define XSI_BASE       0xf100000000000000
+/* Size of the shared_info area (this is not related to page size).  */
+#define XSI_LOG_SIZE   14
+#define XSI_SIZE       (1 << XSI_LOG_SIZE)
+/* Log size of mapped_regs area (64 KB - only 4KB is used).  */
+#define XASI_LOG_SIZE  16
+
 /* Hyperprivops.  */
 #define HYPERPRIVOP_RFI                        0x1
 #define HYPERPRIVOP_RSM_DT             0x2